Effect of ALD Processes on Physical and Electrical Properties of HfO<sub>2</sub> Dielectrics for the Surface Passivation of a CMOS Image Sensor Application
oleh: Honggyun Kim, Vijay D. Chavan, Jamal Aziz, Byoungsu Ko, Jae-Sung Lee, Junsuk Rho, Tukaram D. Dongale, Kyeong-Keun Choi, Deok-Kee Kim
| Format: | Article |
|---|---|
| Diterbitkan: | IEEE 2022-01-01 |
Deskripsi
The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO<sub>2</sub> as well as stacked with 3 and 5 nm Al<sub>2</sub>O<sub>3</sub> thin films. The HfO<sub>2</sub>/Si and Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>/Si metal-oxide-semiconductor structures were used to analyze the fixed charge density (<inline-formula> <tex-math notation="LaTeX">$\text{Q}_{\mathrm {f}}$ </tex-math></inline-formula>) and interface trap density (<inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula>). The as-synthesized samples show high <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\text{Q}_{\mathrm {f}}$ </tex-math></inline-formula> values (10<sup>12</sup> cm<sup>−2</sup>eV<sup>−1</sup>) and a minority carrier lifetime of 15–300 <inline-formula> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula>. The finite-difference time-domain simulation of high-k dielectrics confirmed that the Al<sub>2</sub>O<sub>3</sub> (top)/HfO<sub>2</sub> stacked structures expected higher quantum efficiency for CIS application. The effect of vacuum annealing (VA) and forming gas annealing (FGA) treatments succeeded with the decomposition of the <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> and increase in carrier lifetime. The H<sub>2</sub> ambient FGA samples showed a remarkable decrease in the <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> values. To improve the overall performance of the device after passivation, we employed an Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub> bilayer structure, which showed a low <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> of 10<sup>11</sup> cm<sup>−2</sup>eV<sup>−1</sup> and a minority carrier lifetime of <inline-formula> <tex-math notation="LaTeX">$\sim 3$ </tex-math></inline-formula>,700 <inline-formula> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> after 400 °C and 30 min FGA. We believe that this surface passivation strategy will pave way for future CIS technology regarding the development of lower defective surface and superior performance.