Find in Library

In this paper, with the help of calibrated 2-D simulations, we report a detailed study on the effect of drain induced barrier enhancement on the subthreshold swing and OFF-state current of a short channel MOSFET. We demonstrate that the presence of gate-on-drain overlap in a short channel MOSFET leads to drain induced barrier enhancement (DIBE). We show that as a result of DIBE, a MOSFET can achieve near ideal subthreshold swing, diminished DIBL, constant threshold voltage and improved <inline-formula> <tex-math notation="LaTeX">$\text{I}_{\mathrm {ON}}/\text{I}_{\mathrm {OFF}}$ </tex-math></inline-formula> ratio at room temperature, without being affected by channel length variations.