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Simulation of Figures of Merit for Barristor Based on Graphene/Insulator Junction
oleh: Jun-Ho Lee, Inchul Choi, Nae Bong Jeong, Minjeong Kim, Jaeho Yu, Sung Ho Jhang, Hyun-Jong Chung
Format: | Article |
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Diterbitkan: | MDPI AG 2022-08-01 |
Deskripsi
We investigated the tunneling of graphene/insulator/metal heterojunctions by revising the Tsu–Esaki model of Fowler–Nordheim tunneling and direct tunneling current. Notably, the revised equations for both tunneling currents are proportional to <i>V</i><sup>3</sup>, which originates from the linear dispersion of graphene. We developed a simulation tool by adopting revised tunneling equations using MATLAB. Thereafter, we optimized the device performance of the field-emission barristor by engineering the barrier height and thickness to improve the delay time, cut-off frequency, and power-delay product.