Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

oleh: Haiwu Xie, Hongxia Liu, Shupeng Chen, Tao Han, Shulong Wang

Format: Article
Diterbitkan: MDPI AG 2019-10-01

Deskripsi

This paper designs and investigates a novel structure of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly doped source. Similar to the conventional HJLTFET, the proposed structure still adopts an InAs/GaAs<sub>0.1</sub>Sb<sub>0.9</sub> heterojunction at source and channel interface and employs a polarization electric field at the arsenic heterojunction induced by the lattice mismatch in the InAs and GaAs<sub>0.1</sub>Sb<sub>0.9</sub> zinc blende crystal to improve band to band tunneling (BTBT) current. However, the gate electrode is divided into three parts in DMGE-HJLTFET namely the auxiliary gate (M1), control gate (M2) and tunnel gate (M3) with workfunctions &#934;<sub>M1</sub>, &#934;<sub>M2</sub> and &#934;<sub>M3</sub>, where &#934;<sub>M1</sub> = &#934;<sub>M3</sub> &lt; &#934;<sub>M2</sub>, which not only improves ON-state current but also decreases the OFF-state current. In addition, a lightly doped source is used to further decrease the OFF-state current of this device. Simulation results indicate that DMGE-HJLTFET provides superior metrics in terms of logic and analog/radio frequency (RF) performance as compared with conventional HJLTFET, the maximum ON-state current and transconductance of the DMGE-HJLTFET increases up to 5.46 &#215; 10<sup>&#8722;4</sup> A/&#956;m and 1.51 &#215; 10<sup>&#8722;3</sup> S/&#956;m at 1.0 V drain-to-source voltage (Vds). Moreover, average subthreshold swing (SSave) of DMGE-HJLTFET is as low as 15.4 mV/Dec at low drain voltages. Also, DMGE-HJLTFET could achieve a maximum cut-off frequency (<i>f<sub>T</sub></i>) of 423 GHz at 0.92 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 82 GHz at Vgs = 0.88 V, respectively. Therefore, it has great potential in future ultra-low power integrated circuit applications.