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Variance Reduction during the Fabrication of Sub-20 nm Si Cylindrical Nanopillars for Vertical Gate-All-Around Metal-Oxide-Semiconductor Field-Effect Transistors
oleh: Shujun Ye, Kikuo Yamabe, Tetsuo Endoh
Format: | Article |
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Diterbitkan: | American Chemical Society 2019-12-01 |
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