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Abstract Any technology offering zero power dissipation must be reversible. A reversible circuit can be envisaged as a cascade of reversible gates only, such as Toffoli gate, which has two components: k control bits and a target bit (k‐CNOT), k ≥ 1. Analysing testability issues in a reversible circuit is an important phenomenon. A new online design‐for‐testability (DFT) technique for reversible circuits is proposed. The authors’ method yields less overhead in terms of quantum cost as compared to the previous online approaches.