A New Figure of Merit, ${\Delta V_{\text {DIBLSS}} /(I_{\rm {d},{\mathrm{ sat}}} /I_{\rm {sd},{\mathrm{ leak}}} )}$ , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device

oleh: Yi-Chuen Eng, Luke Hu, Tzu-Feng Chang, Steven Hsu, Chun Mao Chiou, Ted Wang, Chih-Wei Yang, Chien-Ting Lin, I-Chang Wang, Ming-Chih Chen, Andy Lai, Pei-Wen Wang, Chia-Jung Hsu, Wen-Yuan Pang, Chin-Hao Kuo, Osbert Cheng, Chih-Yi Wang

Format: Article
Diterbitkan: IEEE 2017-01-01

Deskripsi

This paper aims to investigate the device parameters, including drain-induced barrier lowering (DIBL), subthreshold swing (SS), and saturation drive current, Id,sat, of bulk-Si n-channel FinFET devices (bulk n-FinFETs). The impact of lightly doped drain (LDD) process on the performance of bulk n-FinFETs is also examined in this paper. According to our measured data, excluding LDD in bulk n-FinFETs not only reduces mask costs but it also enables slightly better short-channel control compared to the inclusion of LDD. A new figure of merit, &#x0394;V<sub>DIBLSS</sub>/(I<sub>d,sat</sub>/I<sub>sd,leak</sub>), is introduced for monitoring short-channel performance of bulk n-FinFETs, where &#x0394;V<sub>DIBLSS</sub> accounts for the DIBL and SS, and I<sub>sd,leak</sub> is the source/drain subthreshold off-state leakage current.