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Self-aligned multiple patterning (SAMP) can enable the semiconductor scaling before EUV lithography becomes mature for industry use. Theoretically any small size of pitch can be achieved by repeating SADP on same wafer but with challenges of pitch walking and line cut since line cut has to be done by lithography instead of self-aligned method. Line cut can become an issue at sub-30nm pitch due to edge placement error (EPE). In this paper we will discuss some recent novel ideas on line cut after self-aligned multiple patterning.