Find in Library

A powerful forward error correction (FEC) scheme based on the serial concatenation of Bose-Chaudhuri-Hocquenghen (BCH) and low-density parity-check (LDPC) codes has been adopted by the second generation digital video broadcast (DVB-S2) standard due to their near Shannon limit performance. This paper proposes an efficient FEC encoder core to support different DVB-S2 codes for variable coding modulation (VCM) schemes of low earth orbit (LEO) satellite-ground communications. By exploring the properties of different concatenated BCH-LDPC codes and reusing the computation units and memories, the compatibility is achieved and the utilization of hardware resources is improved. Besides, parallel computing is performed to speed up the acquisition of check bits, which allows the encoding throughput to be increased. Hardware architecture implementation on Xilinx XC7K325t field programmable gate array (FPGA) shows that the encoding throughput rate of the proposed FEC encoder core can reach 1.19 Gb/s. And the overall data throughput is improved by 30.9% compared with the constant coding modulation (CCM) schemes.