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As the feature size of integrated circuits has been scaled down to 10 nm, the rapid increase in the electrical resistance of copper (Cu) metallization has become a critical issue. To alleviate the resistance increases of Cu lines, co-sputtered CoW and CoB alloying metals were investigated as conductors and barriers in this study. Annealing CoM (M = W or B)/SiO₂/<i>p</i>-Si structures reduced the resistivity of CoM alloys, removed sputtering-deposition-induced damage, and promoted adhesion. Additionally, both annealed CoW/SiO₂ or CoB/SiO₂ structures displayed a negligible V_fb shift from capacitance-voltage measurements under electrical stress, revealing an effective barrier capacity, which is attributed to the formation of MO_x layers at the CoM/SiO₂ interface. Based on the thermodynamics, the B₂O₃ layer tends to form more easily than the WO_x layer. Hence, the annealed CoB/SiO₂/<i>p</i>-Si MIS capacitor had a higher capacitance and a larger breakdown strength did than the annealed CoW/SiO₂/<i>p</i>-Si MIS capacitor.