Ultrathin Sub-5-nm Hf&#x2081;&#x208B;<italic>&#x2093;</italic>Zr<italic>&#x2093;</italic>O&#x2082; for a Stacked Gate-all-Around Nanowire Ferroelectric FET With Internal Metal Gate

oleh: Shen-Yang Lee, Chia-Chin Lee, Yi-Shan Kuo, Shou-Wei Li, Tien-Sheng Chao

Format: Article
Diterbitkan: IEEE 2021-01-01

Deskripsi

This study investigates a device&#x2019;s ability to boost its on-state current and subthreshold behavior using a ferroelectric field-effect transistor (FeFET) with an ultrathin sub-5-nm Hf<sub>1-<italic>x</italic></sub>Zr<italic>x</italic>O2 (HZO). A conventional field-effect transistor (FET) with pure hafnium (HfO<sub>2</sub>) is used as a control measure and the impact of an internal metal gate (IMG) is also discussed. The study was conducted by using a sub-5-nm HZO and seed layer to fabricate a gate-all-around (GAA) nanowire (NW); a FeFET with a metal-ferroelectric&#x2013;metal-insulator-semiconductor (MFMIS) structure; and a double layer (DL) of the channel. The channel size used in the experiment was approximately <inline-formula> <tex-math notation="LaTeX">$9.6\times16$ </tex-math></inline-formula> nm<sup>2</sup> and the total thickness of the gate stack was 9.2 nm. This thickness is 50.5&#x0025; less than our previous experiment. The FeFET exhibits a considerably high <inline-formula> <tex-math notation="LaTeX">${I}_{on}$ </tex-math></inline-formula>&#x2013;<inline-formula> <tex-math notation="LaTeX">${I}_{off}$ </tex-math></inline-formula> ratio exceeding 107. The IMG serves as a potential equalizer and the ferroelectric material is arranged in a more symmetrical electric field. This results in a lower subthreshold (sub-<inline-formula> <tex-math notation="LaTeX">${V}_{TH}$ </tex-math></inline-formula>) swing (<inline-formula> <tex-math notation="LaTeX">$S.S._{min}=$ </tex-math></inline-formula> 49.3mV/decade) with a wide range (<inline-formula> <tex-math notation="LaTeX">$10^{3}$ </tex-math></inline-formula>) of drain currentcompared to that without an IMG. The findings indicate that a high-performance GAA FET can be achieved by combining a DL channel, GAA NW, ferroelectric material, and an IMG.