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Multi‐step incremental ADC with extended binary counting
oleh: Y. Zhang, C.‐H. Chen, T. He, G.C. Temes
| Format: | Article |
|---|---|
| Diterbitkan: | Wiley 2016-04-01 |
Deskripsi
A multi‐step incremental ADC (IADC) with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first‐order IADC (IADC1). The second step reuses the single integrator and extends the accuracy to 18 bits by a binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 28 as compared with the single‐step IADC.