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This work comprises of design and simulation of multi-channel line tunnel field-effect transistors (mCLTFETs) by scaling inter-gate separation (IGS) and overlapped source (L_OV). The scope of the work is to explore the performance boost and optimization of the studied devices by considering geometrical structures, low-bandgap materials, IGS and L_OV of the mCLTFETs. The structure is designed without diminishing the subthreshold swing (SS) and the leakage currents through a spacer technology and strained Si_0.6Ge_0.4. The optimal values of IGS and L_OV for the multi-channel concept are estimated subject to several physical constraints of the proposed device. An IGS ≈ 10 nm and a L_OV ≈ L_G/2 are reported as suitable choice for sub-8-nm technological nodes, where SS = 18 mV/dec and I_on/I_off = 10⁹ are achieved.