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The negative bias stress normally yields a negative threshold voltage shift of the thin film transistors due to the additional positive charges trapped in the gate dielectrics or at channel/gate insulator interface. However, a positive threshold voltage shift of the device with the post InGaZnO deposition annealing at 400 °C is observed in our devices. The Na⁺ incorporation from Mo gate into the gate dielectric after 400 °C annealing is responsible for this abnormal threshold voltage shift. The movement of Na⁺ ions toward the gate electrode by the negative gate bias decreases the distance between the gate electrode and the Na⁺ ions. Therefore, the voltage drop between the gate electrode and the Na⁺ ions reduces, and a corresponding positive threshold voltage shift is observed. Inserting a SiNx layer between the SiOx gate insulator and the Mo gate electrode can reduce the Na⁺ mobility, and thus a normal negative threshold voltage shift resumes.